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CS5530 Geode TM
Description
The MK1491-06 is a low cost, low jitter, high performance clock synthesizer for National Semiconductor CS5530 based computer and portable appliance applications. Using patented analog Phase-Locked Loop (PLL) techniques, the device accepts a 14.318 MHz crystal input to produce multiple output clocks. It provides selectable PCI local bus and AC97 audio clocks, 24 MHz and 48 MHz clocks for Super I/O and USB, as well as multiple Reference outputs. The device has multiple power down modes to reduce power consumption.
MK1491-06 Clock Source
Features
* Packaged in 28 pin, 300 mil wide SOIC or in 28 pin, 150 mil wide SSOP * Provides all critical timing for the National Semiconductor CS5530 Geode companion chip * Four PCI clocks * Selectable PCIF on up to 2 outputs * Early PCI clock selectability * Up to 4 Reference clocks * 48 MHz USB and 24MHz SIO support * AC97 audio clock * Multiple power down modes * Low EMI Enable pin reduces EMI radiation on PCI clocks (patented) * 3.3 V 5% operation
Block Diagram
VDD 6
GND 5 2 Output Buffers
PCI Clocks
PCI Frequency Select Low EMI Enable PCIF Function Enable Early PCI Enable SLOW# PCISTP# PWRDWN#
3 PCI
Output Buffer
EPCI/PCI
Audio Select
Audio Clock Fixed Clocks
Output Buffer Output Buffer Output Buffer Output Buffers 3
16.934 MHz or 24.576 MHz or 49.152 MHz 48 MHz 14.318 MHz or 24 MHz
14.3M/24M Select XI 14.31818 MHz crystal XO Crystal Oscillator
MUX
14.318 MHz
MDS 1491-06 F
1
Revision 101700
Printed 11/15/00
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose * CA * 95126 * (408)295-9800tel * www.icst.com
CS5530 Geode TM
Pin Assignment
VDD XI XO GND 14.3M(TS) 14.3M GND 14.3M(SEL AUDIO) VDD SLOW# GND FS SEL24 VDD
MK1491-06 Clock Source
PCI Tristate all clocks Reserved 30 MHz 33.3 MHz 25 MHz 37.5 MHz
PCI Frequency Select Table
28 27 26 25 24 23 22 21 20 19 18 17 16 15
AC97 AUDIO(PEN) PCI VDD 24M/14.3M Frequency PCI Select Table PCI SEL24 24M/14.3M GND 0 14.31818 MHz PCI(EPCI#) 1 24.0 MHz 48M(LE#) VDD PCIF Enable Control 24M/14.3M PEN Pin 25 Pin 24 VDD 0 PCI PCI GND PCISTP# M PCI PCIF PWRDWN# 1 PCIF PCIF PCIF continues to run in PCI STOP mode. See table on page 4.
1 2 3 4 5 6 7 8 9 10 11 12 13 14
TS 0 0 M M 1 1
FS 0 1 0 1 0 1
Early PCI Control Table
EPCI#
0 1
PCI (Pin 22) 1 ns early Normal
AC97 Audio Frequency Select
SEL AUDIO 0 M 1 Type P I O P TI/O O TI/O I I I I I P O I/O I/O O O O TI/O AC97 AUDIO 16.9344 MHz 24.576 MHz 49.152 MHz
EMI Control
LE# 0 1 PCI Low EMI ON OFF
Spread direction is DOWN..
Pin Descriptions
Pin # Name 1, 9, 14 VDD 2 XI 3 XO 4, 7, 11, 17, 23 GND 5 14.3M(TS) 6 14.3M 8 14.3M(SEL AUDIO) 10 SLOW# 12 FS 13 SEL24 15 PWRDWN# 16 PCISTP# 18, 20, 26 VDD 19 24M/14.3M 21 48(LE#) 22 PCI(EPCI#) 24 PCI 25 PCI 27 PCI 28 AC97 AUDIO(PEN)
Description Connect to +3.3V. Must be same voltage on all pins. Crystal connection. Connect to a 14.31818 MHz crystal or input clock. Crystal connection. Connect to a 14.31818 MHz crystal, or leave unconnected for clock. Connect to Ground. 14.318 MHz output. Input control for all clocks per table above. 14.318 MHz buffered reference clock output. 14.318 MHz output and audio frequency select input per table above. PCI normal or slow mode select input per table on page 4. Frequency Select for PCI clocks per table above. Fixed frequency select input per table above. Selects frequency on pin 19. Power down control; defined in table on page 4. PCI Stop power down control; defined in table on page 4. Connect to +3.3V. Must be same voltage on all pins. Fixed frequency clock output per table above. Fixed frequency clock output and low EMI (spread spectrum) enable input per table above. PCI Output clock that can be early. Input control for Early PCI per table above. PCI Output clock. PCI/PCIF control set by PEN per table above. PCI Output clock. PCI/PCIF control set by PEN per table above. PCI Output clock. Audio clock output and PCIF Function Enable per table above.
Key: I = Input, TI = tri-level input, O = Output, P = Power supply connection, (T)I/O = Input on power up, becomes an Output after 10ms. Weak internal pull-up resistors are present on SEL24, EPCI#, FS, LE#, PCISTP#, and SLOW#. These pins should be tied to VDD or GND, and not be left floating. Internal resistors on PEN, SEL AUDIO, and TS pull to a mid-level (M).
MDS 1491-06 F
2
Revision 101700
Printed 11/15/00
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose * CA * 95126 * (408)295-9800tel * www.icst.com
CS5530 Geode TM
Electrical Specifications
Parameter Supply voltage, VDD Inputs and Clock Outputs Ambient Operating Temperature Soldering Temperature Storage temperature Operating Voltage, VDD Input High Voltage, VIH Input Mid-Level Voltage, VIM Input Low Voltage, VIL Output High Voltage, VOH Output Low Voltage, VOL Output High Voltage, VOH Operating Supply Current, IDD Power Down mode Supply Current Short Circuit Current, single output driver Input Capacitance Input Frequency Output Clock Rise Time Output Clock Fall Time Output Clock Duty Cycle, all MHz clocks PCI Output to Output Skew Skew of EPCI with respect to PCI Cycle to Cycle Jitter, PCI clocks EMI reduction, peaks of 5th - 19th odd harmonics Power up time, PWRDWN# high to all clocks stable Power on time, applied VDD to all clocks stable
Note:
MK1491-06 Clock Source
Maximum 7 VDD+0.5 70 260 150 Units V V C C C V V V V V V V mA mA pF MHz ns ns % ps ns ps dB ms ms
Conditions Referenced to GND Referenced to GND Max of 10 seconds
Minimum
Typical
ABSOLUTE MAXIMUM RATINGS (note 2)
-0.5 0 -65 3.1 2 1.2 IOH=-8mA IOL=8mA IOH=-8mA No Load, 33.3 MHz VDD=3.3V 2.4 0.4 VDD-0.4 30 15 60 7 14.31818 0.8 to 2.0V 2.0 to 0.8V At 1.5V Rising edges at 1.5V 1.5 1.5 55 500 3.3 1.4
DC CHARACTERISTICS (VDD = 3.3V unless noted)
3.45 1.6 0.8
AC CHARACTERISTICS (VDD = 3.3V unless noted)
45
49 to 51 1 250 6 8 12
33.3 MHz PCI clock
11 20 25
Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
MDS 1491-06 F
3
Revision 101700
Printed 11/15/00
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose * CA * 95126 * (408)295-9800tel * www.icst.com
CS5530 Geode TM
Power Down Control Table
PCISTP# PWRDWN# SLOW# MODE X 0 X Power Down 0 1 X PCI STOP 1 1 X ON PCI LOW LOW ON PCIF LOW ON ON
MK1491-06 Clock Source
24/14.3 14.3 DESCRIPTION LOW LOW All outputs low. PLLs and Oscillator off. ON ON PCI clocks synchronously enter and leave low state. ON ON All Clocks On.
Key: 1 = connected to VDD, 0 = connected to ground, X = any valid logic level, Combination Input/Outputs should be connected to VDD or Ground through a 10 k resistor as shown below.
Power-On Default Conditions
Input Pin# 5 8 10 12 13 15 16 21 22 28 Function TS SEL AUDIO SLOW# FS SEL24 PWRDWN# PCISTP# LE# EPCI# PEN Default M M 1 1 1 1 1 1 1 M Condition All outputs enabled. Audio clock (pin 28) set to 24.576 MHz PCI clocks set to 33.3 MHz. Refer to Power Down Control Table above. PCI frequency = 33.3 MHz. 24M/14.3M (pin 19) set to 24 MHz. All clocks running. PCI clocks running. Low EMI function OFF Pin 22 set to normal PCI signal (not early). PCI (pin 25) set to PCI clock (33.33 MHz). PCI (pin 24) set to PCIF clock (33.33 MHz).
External Components
The MK1491-06 requires some inexpensive external components for proper operation. Decoupling capacitors of 0.1F should be connected on each VDD pin to ground, as close to the MK1491-06 as possible. A series termination resistor of 33 may be used for each clock output. See the discussion below for other external resistors required for proper I/O operation. The 14.3 MHz oscillator has internal caps that provide the proper load for a parallel resonant crystal with CL =18 pF. For tuning with other values of CL , the formula 2*(C L -18) gives the value of each capacitor that should be connected between X1 and ground and X2 and ground.
I/O Structure
The MK1491-06 provides more functionality in a 28 pin package by using a unique I/O technique. The device checks the status of all I/O pins during power-up and at exit from the Power Down state. This status (pulled high, low, or mid-level) then determines the frequency selections and power down modes (see the tables on pages 2 and 4). Within 10ms after power up, the inputs change to outputs and the clocks start up. In the diagrams to the right, the 33 resistors are the normal output termination resistors. The 10k resistor pulls low to generate a logic zero. Weak internal pull-up resistors are present on SEL24, EPCI#, FS, LE#, PCISTP#, and SLOW#. These pins should be connected directly to VDD or GND if not under active control. Internal resistors on PEN, SEL AUDIO, and TS pull to a mid-level (M). MDS 1491-06 F 4
33
For select = 0 (low)
I/O
10k
to load*
Don't stuff for "1" selection
*Note: Do not use a TTL load. This will overcome the 10 k pulldown and force the input to a logic 1.
Revision 101700
Printed 11/15/00
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose * CA * 95126 * (408)295-9800tel * www.icst.com
CS5530 Geode TM
Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC Publication No. 95.)
MK1491-06 Clock Source
28 pin SOIC
Inches Symbol Min Max A -0.104 A1 0.0040 -B 0.013 0.020 C 0.007 0.013 D 0.697 0.724 E 0.291 0.299 e .050 BSC H 0.394 0.419 h 0.01 0.029 L 0.016 0.050 Millimeters Min Max -2.65 0.10 -0.33 0.51 0.18 0.33 17.70 18.39 7.40 7.60 1.27 BSC 10.01 10.64 0.25 0.74 0.41 1.27
E
INDEX AREA
H
1
2
D A1 e C
h x 45
A L
B
MDS 1491-06 F
5
Revision 101700
Printed 11/15/00
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose * CA * 95126 * (408)295-9800tel * www.icst.com
CS5530 Geode TM
Package Outline and Package Dimensions (For current dimensional specifications, see JEDEC Publication No. 95.)
MK1491-06 Clock Source
28 pin SSOP
Symbol A A1 b c D e E E1 L Inches Min Max 0.053 0.069 0.004 0.010 0.008 0.012 0.007 0.010 0.386 0.394 .025 BSC 0.228 0.244 0.150 0.157 0.016 0.050 Millimeters Min Max 1.35 1.75 0.10 0.25 0.20 0.30 0.19 0.25 9.80 10.01 0.65 BSC 5.79 6.20 3.81 3.99 0.41 1.27
E1
E
INDEX AREA
1
2
D A1 e b c A L
Ordering Information
Part/Order Number MK1491-06R MK1491-06RTR MK1491-06S MK1491-06STR Marking MK1491-06R MK1491-06R MK1491-06S MK1491-06S Low EMI Feature Yes Yes Yes Yes Package Temperature 28 pin SSOP 0 to 70C Add Tape & Reel 0 to 70C 28 pin SOIC 0 to 70C Add Tape & Reel 0 to 70C
While the information presented herein has been checked for both accuracy and reliability, ICS assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Geode is a trademark of National Semiconductor Corporation
MDS 1491-06 F
6
Revision 101700
Printed 11/15/00
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose * CA * 95126 * (408)295-9800tel * www.icst.com

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